DSP56301PW80B1 Freescale Semiconductor, DSP56301PW80B1 Datasheet - Page 18

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DSP56301PW80B1

Manufacturer Part Number
DSP56301PW80B1
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSP56301PW80B1

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
80MHz
Mips
80
Device Input Clock Speed
80MHz
Ram Size
24KB
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
Signals/Connections
1-14
HSERR
HIRQ
HSTOP
HWR/HRW
HIDSEL
HRD/HDS
HFRAME
Signal Name
Output, open
drain
Output, open
drain
Input/
Output
Input
Input
Input
Input/
Output
Type
Tri-stated
Tri-stated
Input
Tri-stated
State During
Table 1-11.
Reset
DSP56301 Technical Data, Rev. 10
Host System Error
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host System Error signal.
Host Interrupt Request
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Interrupt Request signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Host Stop
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Stop signal.
Host Write/Host Read-Write
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Write/Host Read-Write Schmitt-trigger
signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Host Initialization Device Select
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host Initialization Device Select signal.
Host Read/Host Data Strobe
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this is the Host Data Read/Host Data Strobe Schmitt-
trigger signal.
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Host Frame
When the HI32 is programmed to interface with a PCI bus and the HI function
is selected, this is the Host cycle Frame signal.
Non-PCI bus
When HI32 is programmed to interface with a universal, non-PCI bus and the
HI function is selected, this signal must be connected to a pull-up resistor or
directly to V
Port B
When the HI32 is configured as GPIO through the DCTR, this signal is
internally disconnected.
This input is 5 V tolerant.
Host Interface (Continued)
CC
.
Signal Description
Freescale Semiconductor

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