TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 105

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-04252AIPQ
Manufacturer:
XILINX
Quantity:
8
Part Number:
TXC-04252AIPQ
Manufacturer:
TRANSWITCH
Quantity:
12
Part Number:
TXC-04252AIPQ
Manufacturer:
TRANSWITCH
Quantity:
20 000
Part Number:
TXC-04252AIPQ.CA
Manufacturer:
TRANSWITCH
Quantity:
20 000
MEMORY MAP DESCRIPTIONS
COMMON REGISTERS - PROGRAM ID
COMMON REGISTERS - INTERNAL PROCESSOR (SPOT)
*
Address
Address
Registers 6BEH and 6BFH contain the two-part SPOT program release number. In documentation, this number is
written as “PGMRV1, PGMRV2”.
6BD
6BE
6BF
005
006
007
008
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
7-0
7-0
7-0
7-0
7-0
6-3
2-0
7-0
Bit
Bit
7
SPOTPCLD
PGMRV1*
PGMRV2*
PID-CHK
RPSPOT
Symbol
Symbol
SPOT
Load
PC
This value (register 6BEH + register 6BFH + 0x55) is written by SPOT
during initialization, and at the start of each maintenance cycle (2 kHz
rate). The external microprocessor can read this checksum to validate
the revision numbers in registers 6BEH and 6BFH. By writing this loca-
tion with a different value, waiting at least 1 ms, and then reading this
location, the external microprocessor can determine whether the SPOT
program is running.
Part 1 of two-part program release number.
Part 2 of two-part program release number.
TranSwitch Test Register: These bits must be written to 0.
Internal SPOT Processor Load Register: These bits are the lower 8
bits of the 11-bit register which is used as the offset address access for
the SPOT Instruction RAM. During normal operation these bits must be
written to 0.
Reprogram Internal SPOT Processor Control Bit: This bit is written to
1 for accessing the SPOT Instruction RAM. During normal operation this
bit must be written to 0.
TranSwitch Test Bits: These bits must be written to 0.
Internal SPOT Processor Load Register: These bits are the upper 3
bits of the 11-bit register which is used as the offset address access for
the SPOT Instruction RAM. During normal operation these bits must be
written to 0.
TranSwitch Test Register: These bits must be written to 0.
- 105 of 148 -
DATA SHEET
Description
Description
Ed. 3, December 2000
TXC-04252
TXC-04252-MB
QE1M

Related parts for TXC-04252AIPQ