TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 64

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
- When RDI enable (RDIEN) is 0, the microprocessor can control RDI generation:
Note: For 1-Bit RDI mode the following unlatched alarm conditions will not generate a Remote Defect Indica-
tion:
Note: For 1-Bit RDI mode the following microprocessor control bits are disabled and will not generate a Remote
Defect Indication:
OVERHEAD COMMUNICATIONS BIT ACCESS
Microprocessor access is provided for the eight overhead communications bits (O-bits) carried in the two justi-
fication control (JC) bytes in the multiframe format, e.g., in a 2048 kbit/s TU/VT, shown partially below. The bits
in the justification control byte are numbered 1 through 8, starting with C1 as bit 1.
In the receive direction, the eight O-bits are stored in eight 8-bit registers (A and B for each group of 4 ports)
and these registers are updated each frame. The two O-bit nibbles that form a byte in the registers for receiv-
ing and transmitting are from the same multiframe. Bits 3 through 0 in an O-bit register correspond to bits 3
through 6 (C1C2 OOOO RR) in the first justification control byte, and bits 7 through 4 in an O-bit register corre-
spond to bits 3 through 6 in the second justification control byte, as shown below.
- Microprocessor writes a 1 to T1RDIS to generate Remote Defect Indication.
- A drop H4 error (AsDH4E, BsDH4E), when DV1SEL is a 0.
- Mismatch signal label (AnSLER, BnSLER).
- Microprocessor writes a 1 to TnRDIP .
- Microprocessor writes a 1 to TnRDIC.
JC Byte 1
JC Byte 2
Register
Bit
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
C1
C1
Second Justification Control Byte
R
3
7
O-bit Placement in a 2048 kbit/s TU/VT
C2
C2
R
4
6
O-bit Assignment Memory Map
DATA SHEET
O
R
O
5
5
- 64 of 148 -
32 Bytes - Information
N2 (Z6) Byte
O
R
O
6
4
J2 Byte
Other
Bytes
Other
Bytes
O
R
O
3
3
First Justification Control Byte
O
R
O
4
2
R
R
R
5
1
R
R
R
6
0

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