TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 81

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Upon power-up or hardware reset, the contents of the Instruction RAM are assumed to be invalid and execu-
tion of the SPOT program is internally disabled. Before the SPOT processor can begin processing, the micro-
processor must reprogram the Instruction RAM, using the instructions described in the following table, by
performing the procedure described in the flowchart in Figure 26.
The 11-bit SPOT PC Load register SPOTPCLD at address 007H bits 2-0 and address 006H bits 7-0 is first ini-
tialized. This is an offset address into the Instruction RAM. It may not be necessary always to write/read the
entire program, but for normal operation this register should be set to 000H.
In order to access the Instruction RAM, set to 1 the Reprogram SPOT control bit RPSPOT at bit 7 in address
007H. At this time the Data RAM is off-line (i.e., it is inaccessible to the microprocessor), but all register-based
locations are still available. SPOT program execution is disabled when RPSPOT is a 1.
Function "wrPC" causes the Instruction RAM word pointer to be loaded from the SPOT PC Load register. The
SPOT processor automatically increments the Instruction RAM word pointer, which allows the microprocessor
to write all instructions to one address (100H). Since the length of the Instruction RAM is 2048 16-bit words,
4096 IRAM 8-bit write functions ("IRAMwr") are required to program the SPOT processor completely. Tran-
Switch provides the 4096 bytes of code that will implement the features mentioned in this document.
It is recommended, but not required, that the writes to the Instruction RAM should be verified as part of the ini-
tialization procedure. As shown in the flowchart, it is necessary only to use the instruction "wrPC" to reload the
I-RAM word pointer and then perform 4096 I-RAM read cycles using the same fixed data location (100H) as
that used for write (function "IRAMrd").
The programming procedure is completed by setting control bit RPSPOT to 0. At this point, the word pointer is
reloaded and execution of the SPOT processor program execution is enabled. It is important to set control bit
INITSP at address 015H, bit 0 to 1 at some time after programming the SPOT processor. This will cause the
SPOT processor to execute an initialization subroutine from the Instruction RAM that will initialize the Data
RAM and reset its general purpose registers to allow other subroutines to begin running from a known state.
Table 1: Reprogram Functions (valid only when control bit RPSPOT at bit 7 in address 007H is a 1)
wrPC
rdPC0
rdPC1
IRAMwr
IRAMrd
Function
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
Direction
write
write
read
read
read
Interface Address
Microprocessor
102H
102H
103H
100H
100H
DATA SHEET
- 81 of 148 -
IRAMptr <== SPOTPCLD(10-0)
read IRAMptr[7:0]
read IRAMptr[10:8]
*IRAMptr++ <== data
data <== *IRAMptr++
Description
Ed. 3, December 2000
TXC-04252
TXC-04252-MB
QE1M

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