TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 38

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
A(10-0) address setup time and RD/WR setup time before
CS
A(10-0) address hold time and RD/WR delay time after CS
D(7-0) data output float time after CS
CS pulse width
DTACK driven delay after SEL
DTACK float time after SEL
DTACK stable delay after address becomes stable (Note 4)
DTACK pulse width
D(7-0) data output delay
after CS
D(7-0) data output delay
after DTACK
D(7-0) data output tristate to drive delay after CS
Note: CS is an internal signal which is the logical OR of the SEL and LDS lead input signals.
(Internal)
(Output)
(Output)
RD/WR
A(10-0)
DTACK
D(7-0)
(Input)
(Input)
(Input)
SEL
CS
Its timing parameters refer to whichever of these signals controls the associated transition.
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
t
D(2)
Figure 15. Microprocessor Read Cycle Timing - Motorola
Parameter
Register read
SPOT instruction read (Note 2)
Data RAM read (Note 3)
Register read only
SPOT instruction read and data
RAM read only
t
t
D(3)
DATA SHEET
SU(1)
t
- 38 of 148 -
PW(3)
t
D(5)
t
D(1)
Address
t
PW(1)
t
D(4)
Symbol
t
t
t
PW(1)
PW(3)
SU(1)
t
t
t
t
t
t
t
t
Data
H(1)
F(1)
D(2)
F(2)
D(3)
D(1)
D(4)
D(5)
t
F(1)
6 x SPcyc
9 x SPcyc
t
H(1)
Min
3.0
2.0
2.0
2.0
6.0
8.0
2.0
10
40
Typ
33 x SPcyc
7 x SPcyc
Max
0.0
0.0
11
10
10
26
28
t
F(2)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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