TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 65

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Receive J2 Byte Processing
There are two possible received J2 message sizes, 16 bytes (ITU-T), or 64 bytes (ANSI). The QE1M is capa-
ble of dimensioning the transmit (and receive) RAM memory segment to the two sizes (16-Byte or 64-Byte). In
addition, two modes of operation are provided for the 16-byte (ITU-T) format: a microprocessor read mode,
and a compare read mode. The following table lists the various control states associated with J2 processing.
The ITU-T defined 16-byte message consists of an alignment signal of (10000000 00000000) in the most sig-
nificant bit (bit 1) of the message. The remaining 7 bits in each byte carry a data message, as illustrated below.
Note: X = Don’t Care
J2nSIZE
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
0
0
1
Bit
J2nCOM
X
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ITU-T 16-Byte J2 Message Format
Transmit and receive J2 segments are configured for the 16-byte
J2 message size. Microprocessor read for the dropped J2 mes-
sage. J2 alarms are disabled.
Transmit and receive J2 segments are configured for the 16-byte
J2 message size. For receiving, a 16-byte microprocessor mes-
sage is written into a 16-byte segment for comparison against the
received message. The written message must start with the multi-
frame indicator written into the starting location of the segment.
Transmit and receive J2 segments are configured for the 64-byte
J2 message size. Microprocessor read for the dropped J2 mes-
sage. J2 alarms are disabled. The tandem connection feature
must be disabled by setting TCnEN=0 for the port.
2
3
DATA SHEET
- 65 of 148 -
16-Byte J2 Message
4
5
Action
6
7
8
Ed. 3, December 2000
TXC-04252
TXC-04252-MB
QE1M

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