TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 58

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
SDH/SONET AIS DETECTION
The Quad E1 Mapper can detect an upstream AIS condition using the TOH H1/H2 (pointer) bytes or the TOH
E1 (order wire) byte. When control bit SE1AIS (address 014H, bit 3) is 0, the H1/H2 bytes are monitored for an
upstream AIS condition. When the MOD control bits (address 010H, bits 7 and 6) select the VC-4/TUG-3 for-
mat, the H11 and H21 bytes only are monitored for AIS. The monitoring of AIS in the two other H1n/H2n bytes
is disabled. When the MOD control bits select the STS-3 or AU-3 format, each set of the three H1/H2 bytes per
A Drop and B Drop buses are monitored for an AIS indication. Each of the three H1/H2 pointer bytes corre-
sponds to the like-numbered AU-3/STS-1 signal (n=1-3). When the MOD control bits select the STS-1 format,
the H1/H2 bytes per A Drop and B Drop buses are monitored for an AIS indication.
If all ones are detected in the H1/H2 bytes (whose location is determined by the C1 pulse) for three consecu-
tive frames, the alarm bits AsUAISI in addresses 022H and 023H (A bus detected H1/H2 or E1 byte upstream
AIS) or BsUAISI in addresses 026H and 027H (B bus detected H1/H2 or E1 byte upstream AIS) will set.
Recovery occurs when a normal NDF (bits 1 through 4) in H1 is detected for three consecutive frames. A nor-
mal NDF is defined as a 0110, but 1110, 0010, 0100 and 0111 are also recognized as normal. The H1/H2 byte
AIS detection circuits (when selected) for both the A and B Drop buses are disabled by writing a 0 to control bit
HEAISE (address 013H, bit 7).
When control bit SE1AIS is 1, the E1n bytes are monitored for an upstream AIS condition. When the MOD con-
trol bits select the VC-4/TUG-3 format, the E11 byte in both buses is monitored for AIS. The detection of the
upstream AIS indication in the E12 and E13 bytes is disabled. When the MOD control bits select the
AU-3/STS-3 format, each of the three E1n bytes in the A and B Drop buses are monitored for AIS. Each of the
three E1n bytes corresponds to the like-numbered AU-3/STS-1 signal. For STS-1 operation, the single E1 byte
is checked for the upstream AIS indication.
Majority logic is used to determine if an E1n byte is carrying an upstream AIS indication. If 5 or more ones (at
least 5 bits equal to 1 out of the 8 bits) are detected once in a A/B Drop bus E1n byte (whose locations are
determined by the C1 pulse), the alarm bit AsUAISI (A bus detected H1/H2 or E1 Byte AIS) or BsUAISI (B bus
detected H1/H2 or E1 Byte AIS) is set. Recovery occurs when 4 or more zeros (at least 4 bits equal to 0 out of
the 8 bits) are detected once. The E1n byte AIS detection circuits (when selected) for both the A and B Drop
buses are disabled by writing a 0 to control bit HEAISE.
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
DATA SHEET
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