TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 7

• Manufacturer Part Number: TXC-04252AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04252AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Proprietary TranSwitch Corporation Information for use Solely by its Customers.
QE1M
DATA SHEET
TXC-04252
vided in which the drop side V1 reference pulse, either from the drop bus C1J1V1 indicator or from the H4 mul-
tiframe detector, may be used as the add side V1 reference pulse.
When drop bus timing is selected, the output leads are byte-wide data, a parity indicator, an add indicator, and
an optional TU/VT selection indicator signal. The add bus clock, SPE and C1J1V1 signals are disabled.
The Microprocessor Input/Output Interface block consists of an Intel-, Motorola- or multiplexed
address/data-compatible bus interface that provides access to assigned QE1M memory map addresses in the
range from 000H to 7FFH (please see the Memory Map and Memory Map Description sections for further infor-
mation). Interrupt capability is also provided. The alarms that cause the interrupt can be set on positive, nega-
tive, or both positive and negative transitions, or on positive levels. Interrupt mask bits are provided for register
byte locations, and some defined bits.
Control bits are provided which enable an E1 facility or line loopback. Because of the complexity of the
SDH/SONET interface and the two timing modes, SDH/SONET loopback of the TU/VTs is not supported.
The SPOT (SONET Processor for Overhead Termination) block is a RISC processor with associated instruc-
tion and data memory that performs selected low-speed functions, including all overhead processing and
counter maintenance. The SPOT program must be loaded into the SPOT instruction memory after power-up.
Executable microcode is provided by TranSwitch (see the Operations - Internal SPOT Processor section).
The Boundary Scan Interface Block provides a five-lead Test Access Port (TAP) that conforms to the IEEE
1149.1 standard. This standard provides external boundary scan functions to read and write the external
Input/Output leads from the TAP for board and component test.
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TXC-04252-MB
Ed. 3, December 2000