TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 80

• Manufacturer Part Number: TXC-04252AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04252AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Ed. 3, December 2000
QE1M
TXC-04252
TXC-04252-MB
INTERNAL SPOT PROCESSOR
The internal SPOT processor of the QE1M device is a SONET Processor for Overhead Termination. The pur-
pose of the SPOT processor is to relieve the device’s internal logic of the need to support relatively slow func-
tions like performance monitoring and alarm handling. The utility of this feature will grow as communications
standards require tighter control of data flow and network management. In addition, as boards become more
densely populated with VLSI components, the availability of the SPOT processor will help by reducing the
requirement for external components and the workload of the main processor (and the software engineers who
program it).
The SPOT processor is a programmable core which adheres to Reduced Instruction Set Computer (RISC)
principles. It executes one instruction per clock cycle. Instructions are simple, performing data movement,
basic arithmetic functions (8-bit integer operations, but no multiply/divide) and program control. The executable
device microcode required for operation of the SPOT processor and associated descriptive text is available via
the QE1M selection option of the Product Finder on the home page of the TranSwitch Internet World Wide
Web site at www.transwitch.com, where the files are provided in ZIP format.
The SPOT processor is designed to run at 29.16 MHz. This clock is internally derived from the 58.32 MHz
desynchronizer clock input (EXTCK). The Instruction RAM (I-RAM) has 2048 words of 16 bits while the Data
RAM (D-RAM) has 2048 words of 8 bits. The SPOT processor has access to the Microprocessor Interface and
the Add/Drop Engines of the QE1M via an 8-bit data bus, as shown in Figure 25. The SPOT processor is
event-driven, with each client independently and asynchronously requesting service. These maskable
requests are surveyed by a task queue and prioritized by function (Add, Drop, Line). When idle, the SPOT pro-
cessor polls the task queue to identify the next client to be serviced. This results in a call to the appropriate
subroutine(s). During each subroutine, the SPOT processor may transfer data to/from the Add/Drop Engines
or the Microprocessor Interface. The SPOT processor will make decisions regarding control/status and update
any necessary counters and other Data RAM locations. The subroutine is terminated by returning to the idle
loop, and the cycle is then repeated.
The E1 data paths (i.e., for the Add/Drop Engines) are implemented in free-running hardware, and are there-
fore not dependent on the SPOT processor.
The Data RAM contains important information about the status of the E1 channels. Performance counters, J2
messages, etc., are all stored there. The external microprocessor is granted access to the internal Data RAM
when addressing the appropriate locations. Since RAM access is arbitrated, the grant will not be immediate,
and the RDY/DTACK signal is de-asserted until the requested data becomes available.
Since the SPOT processor is effectively a very large state machine, it could enter an unforeseen state (e.g.,
due to a software bug or RAM corruption) which prevents it from servicing all requests in a timely manner.
Although the data path is not interrupted, the path overhead bytes may not be correctly processed under these
conditions. Two status bits have been provided to detect critical errors which are indications of this status:
Parity Error (PERR) in bit 4 of addresses 028H and 029H indicates that a parity error
has occurred in reading the Instruction RAM.
Watchdog Timer Expired (WDTEXP) in bit 6 of addresses 028H and 029H indicates
that the SPOT processor may be unable to service all requests in a timely manner.
Some possible causes for this condition are excessive microprocessor accesses, a
SPOT processor clock that is running too slowly, or a software bug.
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
DATA SHEET
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