TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 144

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Address
(cont.)
03C
03A
03B
7-3
7-1
Bit
0
2
1
0
0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
THRSBY
TRESET
Symbol
TB2DIS
ABOD
ADDI
Add Indicator Inversion: A 1 causes the A and B Add bus output indi-
cator signals (AADD and BADD) to be active high instead of active low
for all TU/VT added to the A or B buses.
Not used:
Transmit Disable BIP2 Tandem Connection Unequipped: A 1 dis-
ables the BIP2 (in bits 1 and 2) from being transmitted in an unequipped
tandem connection (N2) byte.
Add Bus Output Delay: This bit works in conjunction with the ABTE
lead when in Drop timing mode. The add bus data, parity, add indicator,
and optionally the C1J1V1 and SPE (when lead ABTE is low) are
delayed one clock from the Drop bus timing when ABOD is a 0 and two
clocks from the Drop bus timing when ABOD is a 1.
In Add bus timing mode, the add bus data, parity, and add indicator are
delayed 1 clock from the Add bus timing when ABOD is a 0 and are
delayed 2 clocks from the Add bus timing when ABOD is a 1.
Threshold Modulation Disabled: A 1 disables the threshold modula-
tion capability in each of the four modulation circuits. A 0 enables thresh-
old modulation capability in each of the four modulation circuits.
Not used:
Transmit A and B (Add) Reset: Writing a 1 to this bit clears all perfor-
mance counters to zero (saturating) or the FE/FFFE hex values (8/16 bit
non-saturating) and alarms, and initializes the internal FIFOs and state
machines for all channels for the A and B add buses. It does not clear
the control bit settings.
DATA SHEET
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