TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 63
![no-image](/images/manufacturer_photos/0/6/675/transwitch_corporation_sml.jpg)
TXC-04222-AIOG
Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-04222-AIOG.pdf
(246 pages)
Specifications of TXC-04222-AIOG
Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
- Current page: 63 of 246
- Download datasheet (5Mb)
TU/VT POINTER TRACKING
The starting location of the V1 byte is determined by either the V1 pulses in the A/BC1J1V1 signals or the H4
multiframe detection circuits, as described in an earlier section. The TU/VT pointer bit assignment for the V1
and V2 bytes is shown below. The alignment is necessary to determine the starting locations of the V5 byte
and the other bytes that are carrying the DS1 or E1 format.
I = Increment Bit
D = Decrement Bit
N = New Data Flag Bit
SS-bits (VT Size) = 11 for DS1 (1544 kbit/s) and 10 for E1 (2048 kbit/s)
The pointer value is a binary number with a range of 0 to 103 for the DS1 (1544 kbit/s) and 0 to 139 for the E1
(2048 kbit/s) format. The pointer offset indicates the offset from the V2 byte to the V5 byte in the VT1.5/TU-11
or TU-12/VT2 mapping. The pointer bytes are not counted in the offset calculation. The pointer offset arrange-
ment for this format is shown below.
(enabled = 1001 or 0001/1101/1011/1000, normal or disabled = 0110 or 1110/0010/0100/0111)
N
1
N
2
Proprietary TranSwitch Corporation Information for use Solely by its Customers
N
3
VT1.5/TU-11
V1 Byte
N
4
79-102
27-50
53-76
1-24
103
V1
V2
V3
V4
78
25
26
51
52
77
0
5
SS-bits
TU/VT Pointer Offset Locations
6
Pointer Bytes Bit Assignment
7
I
DATA SHEET
- 63 of 246 -
D
8
1
I
D
2
3
I
VT2/TU-12
106-138
71-103
36-68
1-33
105
139
104
V1
V2
V3
V4
34
35
69
70
V2 Byte
D
0
4
5
I
D
6
TXC-04222-MB, Ed. 6
7
I
TXC-04222
TEMx28
D
8
June 2003
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