TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 41

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

Note: A single TU/VT (number 21/28 in STS-1 number 3) is shown for illustration purposes. The A and B add bus out-
A/BDC1J1V1
A/BDCLK clock period
A/BDCLK duty cycle t
A/BD(7-0)/A/BDPAR data /parity setup time before A/BDCLK
A/BD(7-0)/A/BDPAR data /parity hold time after A/BDCLK
A/BDSPE setup time before A/BDCLK
A/BDSPE hold time after A/BDCLK
A/BDC1J1V1 setup time before A/BDCLK
A/BDC1J1V1 hold time after A/BDCLK
A/BA(7-0)/A/BAPAR data /parity out valid delay from
A/BDCLK
A/BA(7-0)/A/BAPAR data /parity to tristate delay from
A/BDCLK
A/BADD add indicator delay from A/BDCLK
A/BA(7-0)/A/BAPAR data /parity out tristate to driven delay from
A/BDCLK
Note: All output times are measured with the 50 pf load capacitance.
A/BD(7-0)
A/BDSPE
A/BA(7-0)
A/BDCLK
A/BDPAR
A/BAPAR
Figure 16. STS-3 A/B Drop and Add Bus Signals, Timing Derived from Drop Bus (lead ABTE high)
(Output)
A/BADD
(Output)
(Input)
(Input)
(Input)
(Input)
puts are delayed an additional clock cycle from their respective drop bus timing inputs when control bit ABOD (bit
1, 03BH) is written with a 1.
t
t
SU(1)
SU(3)
Proprietary TranSwitch Corporation Information for use Solely by its Customers
C1(1)
C1(1)
t
t
H(1)
H(3)
PWH
C1(2)
t
PWH
/t
Parameter
CYC
t
CYC
C1(3)
t
SU(2)
Data
t
H(2)
DATA SHEET
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t
t
t
OD(1)
OD(4)
OD(3)
Selected
TU/VT
J1 STS-1 #1
STS-1 #1
J1 Byte
Selected
TU/VT
Symbol
t
t
t
t
t
t
t
t
t
t
t
OD(1)
OD(2)
OD(4)
OD(3)
SU(1)
SU(2)
SU(3)
CYC
H(1)
H(2)
H(3)
J1 STS-1 #2
STS-1 #2
t
Occurs every four frames
OD(2)
when provided in place
of the H4 byte
J1 STS-1 #3
STS-1 #3
Min
5.0
2.0
5.0
3.0
5.0
3.0
4.0
4.0
4.0
4.0
40
V1 STS-1 #1
STS-1 #1
Data
51.44
Typ
50
TXC-04222-MB, Ed. 6
Max
21.0
15.0
18.0
15.0
60
TXC-04222
TEMx28
June 2003
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%