TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 44
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TXC-04222-AIOG
Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-04222-AIOG.pdf
(246 pages)
Specifications of TXC-04222-AIOG
Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
- Current page: 44 of 246
- Download datasheet (5Mb)
June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Note: A single TU/VT (number 21/28 in STS-1 number 3) is shown for illustration purposes. The A and B add bus out-
A/BACLK
A/BASPE
ACLK clock period
ACLK duty cycle, t
AC1J1V1 setup time before ACLK
AC1J1V1 hold time after ACLK
ASPE setup time before ACLK
ASPE hold time after ACLK
A(7-0)/APAR data /parity out valid delay from ACLK
A(7-0)/APAR data /parity to tristate delay from ACLK
ADD add indicator delayed from ACLK
A(7-0)/APAR data /parity out tristate to driven delay
from ACLK
Note: All output times are measured with the specified load capacitance.
A/BAC1J1V1
(Input)
A/BA(7-0)
A/BAPAR
(Output)
A/BADD
(Output)
(Input)
(Input)
puts are delayed an additional clock cycle from their respective add bus timing inputs when control bit ABOD (bit
1, 03BH) is written with a 1.
t
SU(1)
C1(1)
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Figure 19. STS-3 A/B Add Bus Signals, Timing Derived from Add Bus
t
PWH
H(1)
Parameter
t
/t
PWH
CYC
t
CYC
t
SU(2)
DATA SHEET
t
H(2)
- 44 of 246 -
t
t
t
OD(1)
OD(2)
OD(4)
Symbol
t
t
t
t
t
t
t
OD(2)
OD(3)
OD(1)
OD(4)
SU(1)
t
SU(2)
t
CYC
H(1)
H(2)
J1 STS-1 #1
Selected
TU/VT
J1 STS-1 #2
Load
50pF
50pF
50pF
t
OD(3)
J1 STS-1 #3
Min
5.0
5.0
5.0
5.0
4.0
4.0
4.0
4.0
40
V1 STS-1 #1
51.44
Typ
Occurs every four frames
50
V1 STS-1 #2
when enabled
Max
21.0
17.0
V1 STS-1 #3
60
15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
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