UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 123

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

5.3 Instruction Address Addressing
byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is
executed. When a branch instruction is executed, the branch destination information is set to the PC and branched
by the following addressing (for details of instructions, refer to 78K/0 Series Instructions User’s Manual (U12326E)).
5.3.1 Relative addressing
An instruction address is determined by program counter (PC) contents and is normally incremented (+1 for each
[Function]
[Illustration]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two’s complement data (–128 to +127) and bit 7 becomes a sign bit.
In other words, relative addressing consists in relative branching from the start address of the following instruction
to the –128 to +127 range.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
PC
When S = 0, all bits of
When S = 1, all bits of
15
15
15
are 0.
are 1.
CHAPTER 5 CPU ARCHITECTURE
8
PC
+
User’s Manual U14046EJ5V0UD
7
S
6
jdisp8
0
0
0
...
PC indicates the start address
of the instruction after the BR instruction.
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