UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 275

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(5) AV
(6) Interrupt request flag (ADIF0)
(7) Conversion results just after A/D conversion start
(8) A/D conversion result register 0 (ADCR0) read operation
A/D conversion
Remarks 1. n = 0, 1, ......, 7
A series resistor string of several tens of k
Therefore, when the output impedance of the reference voltage is too high, it seems as if the AV
series resistor string are connected in series. This may cause a greater reference voltage error.
The interrupt request flag (ADIF0) is not cleared even if analog input channel specification register 0 (ADS0) is
changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D conversion result and conversion
end interrupt request flag for the pre-change analog input may be set just before the ADS0 rewrite. Caution is
therefore required since, at this time, when ADIF0 is read immediately just after the ADS0 rewrite, ADIF0 is set
despite the fact that the A/D conversion for the post-change analog input has not finished.
When A/D conversion is restarted after it is stopped, clear ADIF0 before restart.
The A/D conversion value immediately after A/D conversion has been started may not satisfy the rated value.
Take measures such as polling the A/D conversion end interrupt request (INTAD0) and removing the first
conversion results.
When A/D converter mode register 0 (ADM0) and analog input channel specification register 0 (ADS0) are written,
the contents of ADCR0 may become undefined. Read the conversion result following conversion completion
before writing to ADM0 and ADS0. Using a timing other than the above may cause an incorrect conversion result
to be read.
REF
INTAD0
ADCR0
pin input impedance
ADM0 rewrite
(start of ANIn conversion)
2. m = 0, 1, ......, 7
Figure 13-15. A/D Conversion End Interrupt Request Generation Timing
CHAPTER 13 8-BIT A/D CONVERTER ( PD780024A, 780024AY SUBSERIES)
ANIn
User’s Manual U14046EJ5V0UD
ADS0 rewrite
(start of ANIm conversion)
ANIn
ANIn
is connected between the AV
ANIm
Undefined
ADIF is set but ANIm
conversion has not finished.
REF
pin and the AV
ANIm
ANIm
SS
REF
pin.
ANIm
pin and the
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