UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 78

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(1) Port pins (2/2)
(2) Non-port pins (1/2)
76
P75
P70
P71
P72
P73
P74
INTP0
INTP1
INTP2
INTP3
SI30
SI31
SO30
SO31
SCK30
SCK31
RxD0
TxD0
ASCK0
TI00
TI01
TI50
TI51
TO0
TO50
TO51
PCL
BUZ
AD0 to AD7
Pin Name
Pin Name
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
CHAPTER 3 PIN FUNCTION ( PD780024A, 780034A SUBSERIES)
Port 7
6-bit I/O port
Input/output mode can be specified in 1-bit units.
An on-chip pull-up resistor can be used by software
settings.
External interrupt request input with specifiable valid edges
(rising edge, falling edge, both rising and falling edges)
Serial interface serial data input
Serial interface serial data output
Serial interface serial clock input/output
Asynchronous serial interface serial data input
Asynchronous serial interface serial data output
Asynchronous serial interface serial clock input
External count clock input to 16-bit timer/event counter 0
Capture trigger input to 16-bit timer/event counter 0 capture
register (CR00, CR01)
Capture trigger input to 16-bit timer/event counter 0
capture register (CR00)
External count clock input to 8-bit timer/event counter 50
External count clock input to 8-bit timer/event counter 51
16-bit timer/event counter 0 output
8-bit timer/event counter 50 output
(also used for 8-bit PWM output)
8-bit timer/event counter 51 output
(also used for 8-bit PWM output)
Clock output (for main system clock and subsystem clock
trimming)
Buzzer output
Lower address/data bus when expanding external memory
User’s Manual U14046EJ5V0UD
Function
Function
After Reset
After Reset
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
TI00/TO0
TI01
TI50/TO50
TI51/TO51
PCL
BUZ
P00
P01
P02
P03/ADTRG
P20
P34
P21
P35
P22
P36
P23
P24
P25
P70/TO0
P71
P72/TO50
P73/TO51
P70/TI00
P72/TI50
P73/TI51
P74
P75
P40 to P47
Alternate
Alternate
Function
Function