UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 192

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

190
(4) Prescaler mode register 0 (PRM0)
Address: FF61H
Symbol
PRM0
This register is used to set the 16-bit timer counter 0 (TM0) count clock and TI00, TI01 input valid edges.
PRM0 is set by an 8-bit memory manipulation instruction.
RESET input clears PRM0 to 00H.
Notes 1. Expanded-specification products of PD780024A, 780034A Subseries only.
Cautions 1. Always set data to PRM0 after stopping the timer operation.
Remarks 1. f
2. The external clock requires a pulse longer than two cycles of the internal count clock (f
3. When the valid edge of TI00 is selected, the main system clock is used as the sampling clock for noise
2. TI00, TI01: 16-bit timer/event counter 0 input pin
2. If the valid edge of TI00 is to be set as the count clock, do not set the clear & start mode
3. If the TI00 or TI01 pin is high level immediately after system reset, the rising edge is
elimination. The valid edge of TI00 can be used only when the main system clock is operating.
PRM01
ES11
ES11
ES01
X
and the capture trigger at the valid edge of TI00.
Moreover, do not use the P70/TI00/TO0 pin as a timer output (TO0).
immediately detected after the rising edge or both the rising and falling edges are set as
the valid edge(s) of the TI00 pin or TI01 pin to enable the operation of 16-bit timer counter
0 (TM0). Be careful when pulling up the TI00 pin or the TI01 pin. However, when re-enabling
operation after the operation has been stopped once, the rising edge is not detected.
: Main system clock oscillation frequency
7
0
0
1
1
0
0
1
1
0
0
1
1
After reset: 00H
Figure 8-5. Format of Prescaler Mode Register 0 (PRM0)
PRM00
ES10
ES10
ES00
6
0
1
0
1
0
1
0
1
0
1
0
1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
f
f
f
TI00 valid edge
X
X
X
/2
/2
R/W
ES01
2
6
5
User’s Manual U14046EJ5V0UD
ES00
Notes 2, 3
4
TI01 valid edge selection
TI00 valid edge selection
8.38 MHz
2.09 MHz
130 kHz
Count clock selection
3
0
f
X
= 8.38 MHz
2
0
12 MHz
3 MHz
187 kHz
PRM01
f
X
1
= 12 MHz
PRM00
Note 1
0
X
/2
3
).