UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 317

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(b) Parity types and operations
The parity bit is used to detect bit errors in communication data. Usually, the same type of parity bit is used
by the transmitting and receiving sides. When odd parity or even parity is set, errors in the parity bit (the
odd-number bit) can be detected. When zero parity or no parity is set, errors are not detected.
(i) Even parity
(ii) Odd parity
(iii) Zero parity
(iv) No parity
• During transmission
• During reception
• During transmission
• During reception
During transmission, the parity bit is set to “0” regardless of the transmit data.
During reception, the parity bit is not checked. Therefore, no parity errors will occur regardless of
whether the parity bit is a “0” or a “1”.
No parity bit is added to the transmit data.
During reception, receive data is regarded as having no parity bit. Since there is no parity bit, no parity
errors will occur.
The number of bits in transmit data that includes a parity bit is controlled so that there are an even
number of character bits whose value is 1. The value of the parity bit is as follows.
If the transmit data contains an odd number of character bits whose value is 1: the parity bit is “1”
If the transmit data contains an even number of character bits whose value is 1: the parity bit is “0”
The number of character bits whose value is 1 is counted in the receive data that includes a parity
bit, and a parity error occurs when the counted result is an odd number.
The number of bits in transmit data that includes a parity bit is controlled so that there is an odd number
of character bits whose value is 1. The value of the parity bit is as follows.
If the transmit data contains an odd number of character bits whose value is 1: the parity bit is “0”
If the transmit data contains an even number of character bits whose value is 1: the parity bit is “1”
The number of character bits whose value is 1 is counted in the receive data that includes a parity
bit, and a parity error occurs when the counted result is an even number.
CHAPTER 16 SERIAL INTERFACE UART0
User’s Manual U14046EJ5V0UD
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