AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 14

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2.11
14
R - Java register remap
T - Scratch bit
L - Lock flag
Q - Saturation flag
V - Overflow flag
N - Negative flag
Z - Zero flag
C - Carry flag
System registers
AVR32
When this bit is set, the addresses of the registers in the register file is dynamically changed.
This allows efficient use of the register file registers as a stack. For more details, see chapter 3..
The R bit is cleared at reset. Undefined behaviour may result if this bit is modified by the user.
This bit is not set or cleared implicit by any instruction and the programmer can therefore use
this bit as a custom flag to for example signal events in the program. This bit is cleared at reset.
Used by the conditional store instruction. Used to support atomical memory access. Automati-
cally cleared by rete. This bit is cleared after reset.
The saturation flag indicates that a saturating arithmetic operation overflowed. The flag is sticky
and once set it has to be manually cleared by a csrf instruction after the desired action has been
taken. See the Instruction set description for details.
The overflow flag indicates that an arithmetic operation overflowed. See the Instruction set
description for details.
The negative flag is modified by arithmetical and logical operations. See the Instruction set
description for details.
The zero flag indicates a zero result after an arithmetic or logic operation. See the Instruction set
description for details.
The carry flag indicates a carry after an arithmetic or logic operation. See the Instruction set
description for details.
The system registers are placed outside of the virtual memory space, and are only accessible
using the privileged mfsr and mtsr instructions, see
cal locations is IMPLEMENTATION DEFINED, but a maximum of 256 locations can be
addressed with the dedicated instructions. Some of the System Registers are altered automati-
cally by hardware.
The reset value of the System Registers are IMPLEMENTATION DEFINED.
Table 2-7 on page
15. The number of physi-
32000D–04/2011