AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 158

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

158
AVR32
CP.W – Compare Word
Architecture revision:
Architecture revision1 and higher.
Description
Performs a compare between the two operands specified. The operation is implemented by
doing a subtraction without writeback of the difference. The operation sets the status flags
according to the result of the subtraction, but does not affect the operand registers.
Operation:
I.
II.
III.
Syntax:
I.
II.
III.
Operands:
I.
II.
III.
Status Flags:
Opcode
15
15
0
0
Rd - Rs;
Rd - SE(imm6);
Rd - SE(imm21);
cp.w
cp.w
cp.w
{d, s} ∈ {0, 1, …, 15}
d ∈ {0, 1, …, 15}
imm ∈ {-32, -31, ..., 31}
d ∈ {0, 1, …, 15}
imm ∈ {-1048576, -104875, ..., 1048575}
Format I: OP1 = Rd, OP2 = Rs
Format II: OP1 = Rd, OP2 = SE(imm6)
Format III:OP1 = Rd, OP2 = SE(imm21)
Q:
V:
N:
Z:
C:
Format I:
Format II:
0
1
13
13
0
0
Rd, Rs
Rd, imm
Rd, imm
Not affected
V ← (OP1[31] ∧ ¬OP2[31] ∧ ¬RES[31]) ∨ (¬OP1[31] ∧ OP2[31] ∧ RES[31])
N ← RES[31]
Z ← (RES[31:0] == 0)
C ← ¬OP1[31] ∧ OP2[31] ∨ OP2[31] ∧ RES[31] ∨ ¬OP1[31] ∧ RES[31]
12
12
1
1
Rs
10
0
9
9
8
0
0
imm6
0
1
4
1
4
3
3
Rd
Rd
32000D–04/2011
0
0