AD9644 Analog Devices, AD9644 Datasheet - Page 11

• Manufacturer Part Number: AD9644
• Description: 14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9644

• Resolution (bits): 14bit
• # Chan: 2
• Sample Rate: 155MSPS
• Analog Input Type: Diff-Bip
• Ain Range: 1.75 V p-p
• Adc Architecture: Pipelined

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
ADC Power Supplies
ADC Analog
Digital Input
11, 15, 22, 27, 28
2, 4, 7, 9, 37, 38, 41,
3, 12, 25, 32, 34, 35
10, 16, 21, 26
0
40
39
45
46
36
1
5
6
8
24
23
14
13
42, 43, 44, 47, 48
Mnemonic
DRVDD
AVDD
DNC
DRGND
AGND,
Exposed Pad
VIN+A
VIN−A
VIN+B
VIN−B
VCMA
VCMB
CLK+
CLK−
SYNC
DSYNC+A
DSYNC−A
DSYNC+B
DSYNC−B
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD
MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
Type
Supply
Supply
Driver
Ground
Ground
Input
Input
Input
Input
Output
Output
Input
Input
Input
Input
Input
Input
Input
DRGND
DRVDD
VCMB
AVDD
AVDD
AVDD
AVDD
SYNC
CLK+
CLK–
DNC
DNC
Figure 4. LFCSP Pin Configuration (Top View)
10
12
11
1
2
3
4
5
6
7
8
9
Description
Digital Output Driver Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
Do Not Connect.
Digital Driver Supply Ground.
The exposed thermal pad on the bottom of the package provides the analog
ground for the part. This exposed pad must be connected to ground for
proper operation.
Differential Analog Input Pin (+) for Channel A.
Differential Analog Input Pin (−) for Channel A.
Differential Analog Input Pin (+) for Channel B.
Differential Analog Input Pin (−) for Channel B.
Common-Mode Level Bias Output for Channel A Analog Input.
Common-Mode Level Bias Output for Channel B Analog Input.
ADC Clock Input—True.
ADC Clock Input—Complement.
Input Clock Divider Synchronization Pin.
Active Low JESD204A LVDS Channel A SYNC Input—True/JESD204A CMOS
Channel A SYNC Input.
Active Low JESD204A LVDS Channel A SYNC Input—Complement.
Active Low JESD204A LVDS Channel B SYNC Input—True/JESD204A CMOS
Channel A SYNC Input.
Active Low JESD204A LVDS Channel B SYNC Input—Complement.
Rev. C | Page 11 of 44
(Not to Scale)
AD9644
VIEW
TOP
36
35
34
33
32
31
30
29
28
27
26
25
VCMA
DNC
DNC
PDWN
DNC
CSB
SCLK
SDIO
DRVDD
DRVDD
DRGND
DNC
AD9644