ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 149
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
10.6.6.2 Sensorless Mode
This mode is used to detect BEMF zero crossing
and end of demagnetization events.
The analog phase multiplexer connects the non-
excited motor winding to an analog 100mV hyster-
esis comparator referred to a selectable reference
voltage.
IS[1:0] bits in MPHST register allow to select the
input which will be drive to the comparator (either
MCIA, B or C). Be careful that the comparator is
OFF until CKE and/or DAC bit are set in MCRA
register.
The VR[2:0] bits in the MCRC register select the
reference voltage from seven internal values de-
pending on the noise level and the application volt-
age supply. The reference voltage can also be set
externally through the MCVREF pin when the
VR[2:0] bits are set.
Table 25. Threshold voltage setting
*Typical value for V
BEMF detections are performed during the meas-
urement window, when the excited windings are
free-wheeling through the low side switches and
diodes. At this stage the common star connection
VR2
1
1
1
1
0
0
0
0
VR1
1
1
0
0
1
1
0
0
VR0
1
0
1
0
1
0
1
0
DD
=5V.
Vref voltage threshold
Threshold voltage set by
external MCVREF pin
3.5V*
2.5V*
1.5V*
0.6V*
0.2V*
2V*
1V*
voltage is near to ground voltage (instead of V
when the excited windings are powered) and the
complete BEMF voltage is present on the non-ex-
cited winding terminal, referred to the ground ter-
minal.
The zero crossing sampling frequency is then de-
fined, in current mode, by the measurement win-
dow generator frequency (SA[3:0] bits in the
MPRSR register) or, in voltage mode, by the PWM
generator frequency and phase U duty cycle.
During a short period after a phase commutation
(C event), the winding where the back-emf will be
read is no longer excited but needs a demagneti-
sation phase during which the BEMF cannot be
read. A demagnetization current goes through the
free-wheeling diodes and the winding voltage is
stuck at the high voltage or to the ground terminal.
For this reason an “end of demagnetization event”
D must be detected on the winding before the de-
tector can sense a BEMF zero crossing.
For the end-of-demagnetization detection, no spe-
cial PWM configuration is needed, the comparator
sensing is done at a selectable frequency (f
see
So, the three events: C (commutation), D (demag-
netization) and Z (BEMF zero crossing) must al-
ways occur in this order in autoswitched mode
when hard commutation is selected.
The comparator output is processed by a detector
that automatically recognizes the D or Z event, de-
pending on the CPB or ZVD edge and level config-
uration bits as described in
To avoid wrong detection of D and Z events, a
blanking window filter is implemented for spike fil-
tering. In addition, by means of an event counter,
software can filter several consecutive events up
to a programmed limit before generating the D or Z
event internally. This is shown in
Figure
Table
80.
82.
ST7MC1xx/ST7MC2xx
Table
30.
Figure 79
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SCF
DD
and
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