ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 253
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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SUPPLY CURRENT CHARACTERISTICS (Cont’d)
12.4.2 Wait and Slow-wait Modes
Figure 133. Typical I
Notes:
1. Data based on characterization results, tested in production at V
2. Measurements are done in the following conditions:
- Program executed from RAM, CPU running with RAM access. The increase in consumption when executing from Flash
is 50%.
- All I/O pins in input mode with a static value at V
- All peripherals in reset state.
- LVD disabled.
- Clock input (OSC1) driven by external square wave.
- In Slow and Slow-wait mode, f
Symbol
consumption.
To obtain the total current consumption of the device, add the clock source
I
DD
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
0
Supply current in Wait mode
(see
Supply current in Slow-wait mode
(see
1
Figure
Figure
2
133)
134)
Parameter
DD
3
in Wait vs. f
Fcpu Mhz
4
CPU
is based on f
5
2)
CPU
6
2)
7
OSC
DD
or V
divided by 32.
8
SS
f
f
OSC
OSC
(no load)
Figure 134. Typical I
=16MHz, f
=16MHz, f
Conditions
DD
2.5
2.0
1.5
1.0
0.5
0.0
0
max. and f
CPU
CPU
1
(Section
=8MHz
=500kHz
CPU
2
max.
12.5.3) and the peripheral power
DD
3
ST7MC1xx/ST7MC2xx
Fcpu Mhz
in Slow-wait vs. f
4
Typ
3.5
8
5
Max
12
6
5
1)
7
253/309
CPU
Unit
mA
8
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