ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 261
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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12.7 EMC CHARACTERISTICS
Susceptibility tests are performed on a sample ba-
sis during product characterization.
12.7.1 Functional EMS (Electro Magnetic
Susceptibility)
Based on a simple running application on the
product (toggling 2 LEDs through I/O ports), the
product is stressed by two electro magnetic events
until a failure occurs (indicated by the LEDs).
■
■
A device reset allows normal operations to be re-
sumed. The test results are given in the table be-
low based on the EMS levels and classes defined
in application note AN1709.
12.7.1.1 Designing hardened software to avoid
noise problems
EMC characterization and optimization are per-
formed at component level with a typical applica-
tion environment and simplified MCU software. It
should be noted that good EMC performance is
Symbol
ESD: Electro-Static Discharge (positive and
negative) is applied on all pins of the device until
a functional disturbance occurs. This test
conforms with the IEC 1000-4-2 standard.
FTB: A Burst of Fast Transient voltage (positive
and negative) is applied to V
a 100pF capacitor, until a functional disturbance
occurs. This test conforms with the IEC 1000-4-
4 standard.
V
V
FESD
FFTB
Voltage limits to be applied on
any I/O pin to induce a function-
al disturbance
Fast transient voltage burst lim-
its to be applied through 100pF
on V
a functional disturbance
DD
and V
Parameter
DD
pins to induce
DD
and V
SS
Flash/ROM devices
Flash devices
ROM devices
through
highly dependent on the user application and the
software in particular.
Therefore it is recommended that the user applies
EMC software optimization and prequalification
tests in relation with the EMC level requested for
his application.
Software recommendations:
The software flowchart must include the manage-
ment of runaway conditions such as:
– Corrupted program counter
– Unexpected reset
– Critical Data corruption (control registers...)
Prequalification trials:
Most of the common failures (unexpected reset
and program counter corruption) can be repro-
duced by manually forcing a low state on the RE-
SET pin or the Oscillator pins for 1 second.
To complete these trials, ESD stress can be ap-
plied directly on the device, over the range of
specification values. When unexpected behaviour
is detected, the software can be hardened to pre-
vent unrecoverable errors occurring (see applica-
tion note AN1015).
V
f
conforms to IEC 1000-4-2
V
f
conforms to IEC 1000-4-2
V
conforms to IEC 1000-4-4
V
conforms to IEC 1000-4-4
OSC
OSC
DD
DD
DD
DD
=5V, T
=5V, T
=5V, T
=5V, T
Conditions
=8MHz, LVD OFF
=8MHz, LVD ON
A
A
A
A
=+25°C,
=+25°C,
=+25°C, f
=+25°C, f
OSC
OSC
ST7MC1xx/ST7MC2xx
=8MHz,
=8MHz,
261/309
Level/
Class
4A
2B
4A
3B
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