ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 180
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
10.6.7.5 Speed Measurement Mode
Motor speed can be measured using two methods
depending on sensor type: period measurement or
pulse counting. Typical sensor handling is de-
scribed here.
Incremental encoders allows accurate speed
measurement by providing a large number of puls-
es per revolution (ppr) with ppr rates up to several
thousands; the higher the ppr rate, the higher the
resolution. The proposed method consists of
Figure 99. Tachogenerator period acquisition using MTIM timer
Figure 100. Encoder Clock frequency measure using MTIM timer
180/309
1
(triggered by software
C
C
or Real-time Clock)
MTIM Counter
Comparator
Capture
MTIM Counter
Interrupts
Compare
Capture
Output
Tacho
Value
Value
Interrupts
Encoder
Value
Clock
To interrupt generator
To interrupt generator
(Capture Event)
(Capture Event)
C
C
C
C
C
S
C
To interrupt generator
(Speed Error Event)
Decreasing Speed
C
Decreasing Speed
C
counting the number of clock cycles issued by the
Incremental Encoder Interface (Encoder Clock)
during a fixed time window (refer to
The tachogenerator has a much lower ppr rate
than the encoder (typically factor 10). In this con-
text, it is more meaningful to measure the period
between Tacho Captures (i.e. relevant transitions
of the incoming signals). Accuracy is imposed by
the reference clock, i.e. the CPU clock (refer to
Figure
C
99).
C
C
C
S
Figure
C
100).
C
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