ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 258
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
CLOCK AND TIMING CHARACTERISTICS (Cont’d)
12.5.4 Clock Security System with PLL
Table 88. PLL Characteristics
Table 89. Clock Detector Characteristics
Notes:
1. Data based on characterization results, not tested in production.
258/309
f
Output Frequency
t
Jitter
f
f
t
t
OSC
Lock
CPU
Detect
setup
hold
Symbol
Symbol
PLL input frequency range
Output frequency when the PLL attain lock.
PLL Lock Time (LOCKED = 1)
Jitter in the output clock
CPU clock frequency when VCO is con-
nected to ground (ICD internal clock or
back up oscillator )
Detected Minimum Input Frequency
Time needed to detect OSCIN once CKD is
enabled
Time needed to detect that OSCIN stops
Parameter
Parameter
Min
Min
7
Typ
Typ
16
50
2
3
3
3
500
Max
Max
100
8
1)
MHz
MHz
MHz
Unit
Unit
KHz
μs
μs
μs
%
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