ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 48
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
EXTERNAL INTERRUPT CONTROL REGISTER (EICR) (Cont’d)
- ei0 (port D6..4)
- ei0 (port D3..1)
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
48/309
1
IS31 IS30
IS31 IS30
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Falling edge only
Rising edge only
Falling edge &
IPA bit =0
low level
External Interrupt Sensitivity
External Interrupt Sensitivity
Falling edge & low level
Rising and falling edge
Rising and falling edge
Falling edge only
Rising edge only
Falling edge only
Rising edge only
Rising edge
& high level
IPA bit =1
Bit 0 = IPA Interrupt polarity for port D
This bit is used to invert the sensitivity of the port D
[6:4] external interrupts. It can be set and cleared
by software only when I1 and I0 of the CC register
are both set to 1 (level 3).
0: No sensitivity inversion
1: Sensitivity inversion
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