ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 32
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
6.3 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD), Auxiliary Voltage
Detector (AVD) and Clock Security System (CSS)
functions. It is managed by the SICSR register.
Note: A reset can also be triggered following the
detection of an illegal opcode or prebyte code. Re-
fer to
tails.
6.3.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
than the V
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
Figure 17. Low Voltage Detector vs Reset
32/309
1
DD
– V
– V
RESET
is below:
IT-
IT+
IT-
section 11.2.1 on page 244
V
V
reference value for a voltage drop is lower
when V
when V
IT-
IT+
IT+
IT-
reference value for power-on in order
reference value. This means that it
V
DD
DD
DD
is falling
is rising
DD
supply voltage is
for further de-
The LVD function is illustrated in
Provided the minimum V
the oscillator frequency) is above V
can only be in two modes:
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
The LVD is an optional function which can be se-
lected by option byte.
It is recommended to make sure that the V
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
V
– under full software control
– in static safe reset
hys
DD
value (guaranteed for
Figure
IT-
, the MCU
17.
DD
sup-
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