ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 175
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
10.6.7.4 Built-in Checks and Controls for
simulated events
As described in
MDREG and MCOMP registers are capture/com-
pare registers. The Compare registers are write
accessible and can be used to generate simulated
events. The value of the MTIM timer is compared
with the value written in the registers and when the
MTIM value reaches the corresponding register
value, the simulated event is generated. Simulated
event generation is enabled when the correspond-
ing bits are set:
– In the MCRB register for simulated demagneti-
– In the MCRC register for simulated zero-crossing
To avoid a system stop, special attention is need-
ed when writing in the register to generate the cor-
responding simulated event. The value written in
Figure 95. Simulated demagnetisation / zero-crossing event generation
sation
and commutation.
– SDM for simulated demagnetisation
– SC for simulated commutation
– SZ for simulated zero-crossing event.
Z
H
During C interrupt
Simulated or Hardware D/Z events
Value written in MDREG/MZREG if
simulated event generation
After C interrupt
MDREG value checked
if MDREG<=MTIM
Immediate D
C
H
Figure 91. on page
S
D
generation
S
168, MZREG,
Z
H
C
H
After D interrupt
MZREG value checked
if MZREG<=MTIM
Immediate Z
D
H
the register has to be greater than the current val-
ue of the MTIM timer when writing in the registers.
If the value written in the registers (MDREG,
MZREG or MCOMP) is already less than the cur-
rent value of MTIM, the simulated event will never
be generated and the system will be stopped.
For this reason, built-in checks and controls have
been implemented in the MTIM timer.
If the value written in one of those registers in sim-
ulated event generation mode is less than or equal
to the current value of the timer when it is com-
pared, the simulated event is generated immedi-
ately and the value of the MTIM timer at the time
the simulated event occurs overwrites the value in
the registers. Like that the value in the register re-
ally corresponds to the simulated event generation
and can be re-used to generate the next simulated
event.
So, the value written in the registers able to gener-
ate simulated events is checked by hardware and
compare to the current MTIM value to verify that it
is greater.
S
generation
Z
S
C
Z
D
Z
C
H
S
H
S
H
Simulated zero-crossing
Hardware zero-crossing
Simulated demagnetisation
Hardware commutation
(SC=0)
ST7MC1xx/ST7MC2xx
D
S
Z
S
t
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