ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 207
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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MOTOR CONTROLLER (Cont’d)
10.6.13 Register Description
TIMER COUNTER REGISTER (MTIM)
Read /Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = T[7:0]: MTIM Counter Value.
These bits contain the current value of the 8-bit up
counter. In Speed Measurement Mode, when us-
ing Encoder sensor and MTIM captures triggered
by SW (refer to
register causes a capture of the [MTIM:MTIML]
register pair to the [MZREG: MZPRV] registers.
TIMER COUNTER REGISTER LSB (MTIML)
Read /Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = TL[7:0]: MTIM Counter Value LSB.
These bits contain the current value of the least
significant byte of the MTIM up counter, when
used in Speed Measurement Mode (i.e. as a 16-bit
timer)
CAPTURE Z
Read /Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = ZP[7:0]: Previous Z Value or Speed
capture LSB.
These bits contain the previous captured BEMF
value (Z
or the LSB of the captured value of the
[MTIM:MTIML] registers in Speed Sensor Mode.
ZP7
TL7
T7
7
7
7
ZP6
TL6
T6
N-1
6
6
6
) in Switched and Autoswitched mode
n-1
ZP5
TL5
T5
5
5
5
Figure
REGISTER (MZPRV)
TL4
ZP4
T4
4
4
4
102) a read access to MTIM
ZP3
TL3
T3
3
3
3
ZP2
TL2
T2
2
2
2
ZP1
TL1
T1
1
1
1
ZP0
TL0
T0
0
0
0
CAPTURE Z
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = ZC[7:0]: Current Z Value or Speed cap-
ture MSB.
These bits contain the current captured BEMF val-
ue (Z
MSB of the captured value of the [MTIM:MTIML]
registers in Speed Sensor Mode. A read access to
MZREG in this case disable the Speed captures
up to MZPRV reading (refer to
Speed Measurement Mode
COMPARE C
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = DC[7:0]: Next Compare Value.
These bits contain the compare value for the next
commutation (C
DEMAGNETIZATION REGISTER (MDREG)
Read/Write
Reset Value: 0000 0000 (00h)
Bits 7:0 = DN[7:0]: D Value.
These bits contain the compare value for simulat-
ed demagnetization (D
for hardware demagnetization (D
and Autoswitched mode.
In Speed Sensor Mode, the register contains the
value used for comparison with MTIM registers to
generate a Speed Error event.
DC7
DN7
ZC7
7
7
7
N
) in Switched and Autoswitched mode or the
DC6
DN6
ZC6
6
6
6
n
n+1
ZC5
DC5
DN5
REGISTER (MZREG)
5
5
5
N+1
REGISTER (MCOMP)
).
DC4
DN4
ZC4
4
4
4
N
ST7MC1xx/ST7MC2xx
) and the captured value
DC3
DN3
ZC3
3
3
3
on page 180).
DC2
DN2
ZC2
Section 10.6.7.5
2
2
2
H
) in Switched
DC1
DN1
ZC1
1
1
1
207/309
DC0
DN0
ZC0
0
0
0
1
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