ST7MC2S6 STMicroelectronics, ST7MC2S6 Datasheet - Page 56
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ST7MC2S6
Manufacturer Part Number
ST7MC2S6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
Manufacturer
STMicroelectronics
Datasheet
1.ST7MC1K4.pdf
(309 pages)
Specifications of ST7MC2S6
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST7MC1xx/ST7MC2xx
I/O PORTS (Cont’d)
Table 11. I/O Port Configurations
Notes:
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
56/309
1
reading the DR register will read the alternate function output status.
the alternate function reads the pin status given by the DR register content.
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
PAD
PAD
PAD
V
V
V
DD
R
DD
DD
R
R
PU
PU
PU
PULL-UP
CONDITION
Hardware Configuration
INTERRUPT
CONDITION
ALTERNATE
ALTERNATE
REGISTER
ENABLE
ENABLE
DR
DR REGISTER ACCESS
EXTERNAL INTERRUPT
SOURCE (ei
REGISTER
REGISTER
DR
DR
DR REGISTER ACCESS
DR REGISTER ACCESS
W
R
x
ALTERNATE
ALTERNATE
)
OUTPUT
OUTPUT
ALTERNATE INPUT
ANALOG INPUT
R/W
R/W
DATA BUS
DATA BUS
DATA BUS
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