TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 64

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

6.2
Registers
6.2.6
31-2
1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
SYSCK
SYSCKFLG
CGCKSEL (System clock selection register)
Bit Symbol
31
23
15
0
0
0
7
0
-
-
-
-
R
R/W
R
Type
30
22
14
0
0
0
6
0
-
-
-
-
Read as "0".
System clock
0: High-speed (fc)
1: Low-speed (fs)
Enable to specify the system clock.
Setting CGOSCCR<XEN> and <XTEN> to "1" in advance is required.
System clock status
0: High-speed (fc)
1: Low-speed (fs)
Shows the status of the system clock.
Switching the oscillator with <SYSCK> generates time lag to complete.
If the output of the oscillator specified in <SYSCK> is read out by <SYSCLKFLG>, the switching has been
completed.
29
21
13
0
0
0
5
0
-
-
-
-
Page 38
28
20
12
0
0
0
4
0
-
-
-
-
27
19
11
Function
0
0
0
3
0
-
-
-
-
26
18
10
0
0
0
2
0
-
-
-
-
SYSCK
25
17
0
0
9
0
1
0
-
-
-
TMPM363F10FG
SYSCKFLG
24
16
0
0
8
0
0
0
-
-
-