MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 3
MSC8101DS
Manufacturer Part Number
MSC8101DS
Description
MSC8101 Network Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101DS.pdf
(116 pages)
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FEATURES
SC140 Core
150 MHz Communications Processor Module (CPM)
100 MHz 64- or 32-bit wide PowerPC Bus interface
Programmable Memory Controller
Large On-chip SRAM
Architecture optimized for efficient C/C++ code compilation
Four 16-bit ALUs and two 32-bit AGUs
1200 DSP MIPS, 3000 RISC MIPS, running at 300 MHz
Very low power dissipation—less than 0.25W for the core running full speed at 1.5 V
Variable-Length Execution Set (VLES) execution model
JTAG/Enhanced OnCE debug port
Programmable protocol machine using a 32-bit RISC engine
155 Mbps ATM interface (including AAL 0/1/2/5)
10/100 Mbit Ethernet interface
Up to four E1/T1 interfaces or one E3/T3 interface and one E1/T1 interface
HDLC support up to T3 rates, or 256 channels
Support for bursts for high efficiency
Glueless interface to PowerPC bus systems
Multi-master support
Control for up to eight banks of external memory
User-programmable machines (UPM) allowing glueless interface to various memory types (SRAM,
DRAM, EPROM, and Flash memory) and other user-definable peripherals
Dedicated pipelined SDRAM memory interface
256K 16-bit words (512 KB)
Unified program and data space configurable by the application
Word and byte addressable
MSC8101 Technical Data
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