MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 48
MSC8101DS
Manufacturer Part Number
MSC8101DS
Description
MSC8101 Network Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101DS.pdf
(116 pages)
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1-42
Port C Signals
General-
Purpose
PC4
I/O
SMC1: SMRXD
SI2: L1ST4
FCC2: CD
HDLC serial , HDLC nibble ,
and transparent
Peripheral Controller:
Name
Dedicated I/O
Protocol
Table 1-9. Port C Signals (Continued)
d I/O Data
Direction
Dedicate
Output
MSC8101 Technical Data
Input
Input
SMC1: Receive Data
Supported by SMC1. The SMC interface consists of SMTXD,
SMRXD, SMSYN, and a clock. Not all signals are used for all
applications. SMCs are full-duplex ports that supports three
protocols or modes: UART, transparent, or general-circuit interface
(GCI).
Serial Interface 2: Layer 1 Strobe 4
In the time-slot assigner supported by SI2. The MSC8101 time-slot
assigner supports up to four strobe outputs that can be asserted on
a bit or byte basis. The strobe outputs are useful for interfacing to
other devices that do not support the multiplexed interface or for
enabling/disabling three-state I/O buffers in a multiple-transmitter
architecture. These strobes can also generate output wave forms
for such applications as stepper-motor control.
FCC2: Carrier Detect
In the standard modem interface signals supported by FCC2 (RTS,
CTS and CD). CD is asynchronous with the data.
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