MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 77
MSC8101DS
Manufacturer Part Number
MSC8101DS
Description
MSC8101 Network Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101DS.pdf
(116 pages)
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36
38
40
42
Note:
No.
FCC output delay after low-to-high clock transition
SCC/SMC/SPI/I
TDM output delay after low-to-high serial clock transition
PIO/TIMER/DMA output delay after low-to-high serial clock transition
a. internal clock (BRGxO)
b. external clock (serial input clock)
a. internal clock (BRGxO)
b. external clock (serial input clock)
1.
Non-Multiplexed Serial Interface signals.
2
C output delay after low-to-high clock transition
SCC/SMC/SPI/I
Serial input clock
SCC/SMC/SPI/I
Figure 2-13. SCC/SMC/SPI/I
FCC outputs
FCC inputs
FCC outputs
FCC inputs
Figure 2-12. FCC External Clock Diagram
Figure 2-11. FCC Internal Clock Diagram
Table 2-18. CPM Output Characteristics
BRGxO
Characteristic
2
C outputs
2
C inputs
BRGxO
MSC8101 Technical Data
16b
16a
1
2
C Internal Clock Diagram
18a
1
38a
17b
17a
19a
36b
36a
Min
0
2
0
0
5
1
CPM Timings
Max
18
20
30
35
14
6
2-23
Unit
ns
ns
ns
ns
ns
ns
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