S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 15
S1K50000
Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1K50000.pdf
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Chapter 2: Precautions on Circuit Design
Chapter 2 Precautions on Circuit Design
2.1 Insertion of Input/Output Buffers
2.2 Use of Differentiating Circuits Inhibited
2.3 Wired Logic Inhibited
10
In the design of your circuit, always be sure to use input/output buffers to exchange signals
with external devices. Because CMOS ICs are extremely susceptible to damage by static
electricity, the input/output buffers contain protective circuits.
In LSIs, the tpd of each gate varies depending on the process dispersions during mass
production or the operating environment. Therefore, differentiating circuits using the relative
time difference of tpd like the one shown in Figure 2-1 cannot obtain a sufficient pulse width,
causing the circuit to operate erratically.
When it is necessary to use a differentiating circuit, be sure to use one that utilizes flip-flops,
rather than the one shown in Figure 2-1.
Because CMOS transistors are used, wired logic cannot be configured as in bipolar
transistors. Therefore, the output pins of cells cannot be connected together, as shown in
Figure 2-2. Output pins can only be connected together in a bus-circuit configuration.
Figure 2-1 Example of a Differentiating Circuit
Figure 2-2 Example of Inhibited Wired Logic
EPSON
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
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