S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 30

• Manufacturer Part Number: S1K50000
• Description: Design Guide S1k50000 Series
• Manufacturer: Epson Electronics America, Inc.

STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
• Do not use internal tri-state buses.
• When using macro cells such as RAM, ROM, or megacells, include the flip-flops to be
• Avoid the use of MSI macros that include flip-flops (e.g., KT175 or KA161).
• The use of circuits that tend to cause racing, such as RS latches and differentiating cir-
• Fix the latch cells with the ATPGEN pin to ensure that they will always be in a through
• Make sure the bidirectional pins are set for input during scan shift mode.
scanned in your circuit configuration before and after the input/output ports of those
macro cells.
cuits, as well as the use of asynchronous circuits, are inhibited.
state.
Correct the circuit to configure internal tri-state buses with multiplexers or the like. If
it is unavoidable to use internal tri-state buses, use the ATPGEN pin to ensure that
those bus circuits will not contend for bus control. However, because this measure is
detrimental to increasing the fault detection rate, do not use such a circuit
configuration if a high fault detection rate is desired.
Without such a circuit configuration, fault detection before and after the macro cells
may not be guaranteed.
MSI cells are not scanned. If a high fault detection rate is desired, do not use MSI
cells.
When using such circuits, be sure to fix the circuit outputs with the ATPGEN pin.
However, because this measure is detrimental to increasing the fault detection rate,
do not use these circuits if a high fault detection rate is desired.
Because this measure is detrimental to increasing the fault detection rate, avoid
using latch cells whenever possible if a high fault detection rate is desired.
If it is unavoidable for the bidirectional pins to be assigned for scan data input or scan
data output, fix the pins for input or output, respectively.
ATPGEN
Figure 2-11 Example of the Processing of Internal Tri-State Buses
XIBCD1
EPSON
KBLT1
Z1
KTSB
KTSB
Chapter 2: Precautions on Circuit Design
25