S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 5

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S1K50000

Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
Contents
ii
Chapter 6 Creating Test Patterns......................................................................... 74
Chapter 7 Estimating Power Consumption......................................................... 83
Chapter 8 Pin Arrangement and Simultaneous Operation ................................ 88
Chapter 9 Precautions on the Use of Dual Power Supplies ............................ 100
Appendix Release Note....................................................................................... 123
5.6 Calculating the Output-Buffer Delay Time ..................................................................70
5.7 Flip-Flop Setup and Hold Times .................................................................................70
5.8 Differentiating Cell Usage ...........................................................................................73
5.9 Intra-Chip Skew ..........................................................................................................73
6.1 Testability Consideration.............................................................................................74
6.2 Usable Waveform Modulation.....................................................................................74
6.3 Limitations on Test Patterns .......................................................................................75
6.4 Precautions Regarding DC Test .................................................................................76
6.5 Precautions on Use of an Oscillator Circuit ................................................................79
6.6 Regarding the AC Test ...............................................................................................80
6.7 Restrictions on Test Patterns for Bidirectional Pins ....................................................81
6.8 Precautions on Handling of the High-Impedance State ..............................................81
7.1 Calculating Power Consumption.................................................................................83
7.2 Limitations on Power Consumption ............................................................................87
8.1 Estimating the Number of Power-Supply Pins ............................................................88
8.2 Simultaneously Operating Buffers and Added Power Supply.....................................88
8.3 Precautions on Pin Arrangement ................................................................................91
9.1 Power-Supply Accommodation.................................................................................100
9.2 Power Supplies in a Dual-Power-Supply System .....................................................101
9.3 Dual-Power-Supply-Type Input/Output Buffers.........................................................101
9.4 Calculating the Delay Time in a Dual-Power-Supply System ...................................118
9.5 Notes on Calculating Power Consumption in a Dual-Power-Supply System............119
9.6 Estimating the Number of Power-Supply Pins in a Dual-Power-Supply System ......121
6.3.1 Test Rate and the Number of Events ................................................................................ 75
6.3.2 Input Delay......................................................................................................................... 75
6.3.3 Pulse Width........................................................................................................................ 75
6.3.4 Input-Waveform Format..................................................................................................... 75
6.3.5 Strobe ................................................................................................................................ 76
6.6.1 Restrictions on Measurement Events ................................................................................ 80
6.6.2 Restrictions on AC Test Measurement Points ................................................................... 80
6.6.3 Restrictions on Delays in the Measured Path.................................................................... 80
6.6.4 Other Restrictions .............................................................................................................. 80
8.3.1 Fixed Power-Supply Pins................................................................................................... 91
8.3.2 Precautions on Pin Arrangement....................................................................................... 91
8.3.3 Example of the Recommended Pin Arrangement ............................................................. 98
9.3.1 LV
9.3.2 LV
9.3.3 HV
9.3.4 HV
9.3.1.1 LV
9.3.1.2 LV
9.3.1.3 LV
9.3.3.1 HV
9.3.3.2 HV
9.3.3.3 HV
DD
DD
DD
DD
-System Input/Output Buffers .................................................................................. 102
-System Fail-Safe Cells........................................................................................... 107
-System Input/Output Buffers ................................................................................. 109
-System Fail-Safe Cells .......................................................................................... 117
DD
DD
DD
DD
DD
DD
-System Input Buffers ..................................................................................... 102
-System Output Buffers .................................................................................. 103
-System Bidirectional Buffers.......................................................................... 105
-System Input Buffers..................................................................................... 109
-System Output Buffers.................................................................................. 111
-System Bidirectional Buffers ......................................................................... 114
EPSON
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE

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