S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 61

• Manufacturer Part Number: S1K50000
• Description: Design Guide S1k50000 Series
• Manufacturer: Epson Electronics America, Inc.

Chapter 4: Circuit Design Taking Testability into Account
56
4.3 Circuit Configuration to Facilitate DC and AC Tests
4.3.1 Configuration of a Test Circuit
The S1K50000 series requires a test-circuit configuration allowing DC and AC tests to be
conducted efficiently.
If such a test circuit is not configured in your circuit design, contact Seiko Epson or its
distributor for confirmation.
Figure 4-1 shows an example of a test circuit. Use this circuit for reference purposes in the
design of a test circuit.
Note that several input and output pins are required for use with a test circuit.
(1) Adding and selecting pins used for testing
Test-mode switch pin
Test-mode select input pin
AC test monitor output pin
DC test monitor output pin
Output and input/output
pins
Add and select the following four types of test pins.
• Test-mode switch pin
• Test-mode select input pin
• AC test monitor output pin
• DC test monitor output pin
Type of Test Pin
Number
of Pins
3 pcs.
1 pc.
1 pc.
1 pc.
—
Table 4-1 Restrictions on Test Pins
Pin Name
(example)
EPSON
TSTEN
OUT3
OUT4
: 1 pc.
: 3 pcs.
: 1 pc.
: 1 pc.
INP0
INP1
INP2
—
Dedicated input pin.
Use XITST1 for the input buffer.
High: test mode; Low: normal mode
Shareable input pin.
This pin cannot be shared with bidirectional
pins.
Avoid sharing this pin with input pins that have
a critical path.
Shareable output pin.
This pin cannot be shared with bidirectional
3-state pins or N-channel open-drain cells.
Output buffers TYPE S and TYPE M cannot be
used.
Shareable output pin.
This pin cannot be shared with bidirectional
3-state pins or N-channel open-drain cells.
Use an input/output buffer with a test mode.
STANDARD CELL S1K50000 SERIES
Restrictions, etc.
DESIGN GUIDE