S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 84
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S1K50000
Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1K50000.pdf
(131 pages)
- Current page: 84 of 131
- Download datasheet (2Mb)
6.5 Precautions on Use of an Oscillator Circuit
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
The following shows examples of oscillator circuits (continuous and intermittent oscillation).
In general, when an oscillator circuit is used, because the oscillation inverter’s drive capability
is small, and because the oscillator circuit’s output waveform is affected by the load of the
measurement environment, the waveform conveyed to the next stage that follows the oscillator
circuit is not exact.
To reproduce a simulated state using a tester, therefore, a measure is taken to apply reverse
drive (by entering into the drain pin a waveform that is in phase with the signal output to the
drain).
When the oscillation inverter is structured as inverter, a reverse drive signal can be produced
simply by entering a signal for the drain that is opposite in phase to the signal applied to the
gate. However, if comprised of a NAND gate (known as an “intermittent oscillator” or “Gated-
OSC”), the signal to be entered for the drain cannot be determined based on the gate signal
alone. For this reason, the reverse-drive waveform is determined based on an expected value
for the drain pin.
With this method, if the input waveform is an NRZ waveform and the strobe exists at the end of
the test rate period, the reverse-drive waveform can be produced using the drain pin’s
expected value for the input waveform directly as is. However, in the case of an RZ waveform,
because the drain pin’s expected value is fixed high or low whether oscillating or idle, the
reverse-drive waveform cannot be determined based on the drain pin’s expected value.
For an intermittently oscillating circuit, therefore, observe the following:
1. Do not use an RZ waveform for the input signal.
2. Do not change the clock signal by changing the state of the enable signal.
Enable signal
Drain-side signal
Gate-side signal
Gate-side signal
Drain-side signal
PAD
PAD
PAD
PAD
Figure 6-2 Examples of Oscillator Circuits
XLOT
XLOT
XLIN
XLIN
X
X
A
A
D
G
E
G
EPSON
Oscillator cell
Oscillator cell
Chapter 6: Creating Test Patterns
X
X
D
Clock signal
Clock signal
79
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