UPD78F0138 NEC, UPD78F0138 Datasheet - Page 129

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

5.4.3 When subsystem clock is not used
connect the XT1 and XT2 pins as follows.
when the X1 input clock and Ring-OSC clock stop. To minimize leakage current, the above on-chip feedback resistor
can be set not to be used via bit 6 (FRC) of the processor clock control register (PCC). In this case also, connect the
XT1 and XT2 pins as described above.
5.4.4 Ring-OSC oscillator
always oscillates after RESET release (240 kHz (TYP.)).
5.4.5 Prescaler
the clock to be supplied to the CPU.
If it is not necessary to use the subsystem clock for low power consumption operations and watch operations,
XT1: Connect directly to EV
XT2: Leave open
In this state, however, some current may leak via the on-chip feedback resistor of the subsystem clock oscillator
Remark The feedback resistor is required to control the bias point of the oscillation waveform so that the bias
Ring-OSC oscillator is incorporated in the 78K0/KE1.
“Can be stopped by software” or “Cannot be stopped” can be selected by a mask option. The Ring-OSC clock
The prescaler generates various clocks by dividing the X1 oscillator output when the X1 input clock is selected as
Caution When the Ring-OSC clock is selected as the clock supplied to the CPU, the prescaler generates
point is in the middle of the power supply voltage.
various clocks by dividing the Ring-OSC oscillator output (f
DD
Figure 5-11. Subsystem Clock Feedback Resistor
or V
Feedback resistor
DD
XT1
CHAPTER 5 CLOCK GENERATOR
User’s Manual U16228EJ2V0UD
P-ch
FRC
XT2
X
= 240 kHz (TYP.)).
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