UPD78F0138 NEC, UPD78F0138 Datasheet - Page 530

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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34.2 Peripheral Hardware That Generates Wait
clocks.
Note No wait cycle is generated for the CPU if the number of wait clocks calculated by the above expression is 1.
Caution When the CPU is operating on the subsystem clock and the X1 input clock is stopped (MCC = 1), do
Remark The clock is the CPU clock (f
530
Watchdog timer
Serial interface UART0
Serial interface UART6
A/D converter
Table 34-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral Hardware
not access the registers listed above using an access method in which a wait request is issued.
Table 34-1. Registers That Generate Wait and Number of CPU Wait Clocks
*The result after the decimal point is truncated if it is less than t
WDTM
ASIS0
ASIS6
ADM
ADS
PFM
PFT
ADCR
<Calculating maximum number of wait clocks>
{(1/f
(1/f
f
f
t
MACRO
CPU
CPUL
CPU
:
MACRO
:
:
), and is rounded up if it exceeds t
Register
) × 2/(1/f
Macro operating frequency
(When bit 5 (FR2) of ADM = “1”: f
CPU clock frequency
Low-level width of CPU clock
CPU
CHAPTER 34 CAUTIONS FOR WAIT
).
CPU
User’s Manual U16228EJ2V0UD
)} + 1
Read
Read
Write
Write
Write
Write
Write
Read
Access
CPUL
X
.
/2, when bit 5 (FR2) of ADM = “0”: f
3 clocks (fixed)
1 clock (fixed)
1 clock (fixed)
2 to 5 clocks
(when ADM.5 flag = “1”)
2 to 9 clocks
(when ADM.5 flag = “0”)
1 to 5 clocks
(when ADM.5 flag = “1”)
1 to 9 clocks
(when ADM.5 flag = “0”)
CPUL
Number of Wait Clocks
after it has been multiplied by
Note
Note
X
/2
2
)

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