UPD78F0138 NEC, UPD78F0138 Datasheet - Page 460

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

460
8-bit
operation
Instruction
Notes 1.
Remarks 1. One instruction clock cycle is one cycle of the CPU clock (f
Group
2.
3.
OR
XOR
CMP
Mnemonic
2. This clock cycle applies to the internal ROM program.
3. n is the number of waits when the external memory expansion area is read.
When the internal high-speed RAM area is accessed or for an instruction with no data access
When an area except the internal high-speed RAM area is accessed
Except “r = A”
control register (PCC).
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
A, #byte
saddr, #byte
A, r
r, A
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
A, [HL + B]
A, [HL + C]
Operands
CHAPTER 28 INSTRUCTION SET
Note 3
Note 3
Note 3
User’s Manual U16228EJ2V0UD
Bytes
2
3
2
2
2
3
1
2
2
2
2
3
2
2
2
3
1
2
2
2
2
3
2
2
2
3
1
2
2
2
Note 1
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
4
6
4
4
4
8
4
8
8
8
Clocks
Note 2
9 + n
5 + n
9 + n
9 + n
9 + n
9 + n
5 + n
9 + n
9 + n
9 + n
9 + n
5 + n
9 + n
9 + n
9 + n
−
8
−
−
5
−
8
−
−
5
−
8
−
−
5
A ← A ∨ byte
(saddr) ← (saddr) ∨ byte
A ← A ∨ r
r ← r ∨ A
A ← A ∨ (saddr)
A ← A ∨ (addr16)
A ← A ∨ (HL)
A ← A ∨ (HL + byte)
A ← A ∨ (HL + B)
A ← A ∨ (HL + C)
A ← A ∨ byte
(saddr) ← (saddr) ∨ byte
A ← A ∨ r
r ← r ∨ A
A ← A ∨ (saddr)
A ← A ∨ (addr16)
A ← A ∨ (HL)
A ← A ∨ (HL + byte)
A ← A ∨ (HL + B)
A ← A ∨ (HL + C)
A − byte
(saddr) − byte
A − r
r − A
A − (saddr)
A − (addr16)
A − (HL)
A − (HL + byte)
A − (HL + B)
A − (HL + C)
CPU
) selected by the processor clock
Operation
Z AC CY
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
Flag
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×