UPD78F0138 NEC, UPD78F0138 Datasheet - Page 392

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

392
(b) Release by RESET input
When the RESET signal is input, STOP mode is released and a reset operation is performed after the
oscillation stabilization time has elapsed.
Remarks 1. f
Ring-OSC clock
RESET signal
Status of CPU
X1 input clock
RESET signal
Status of CPU
×: don’t care
Maskable interrupt
request
RESET input
2. f
Table 19-5. Operation in Response to Interrupt Request in STOP Mode
Release Source
XP
R
: Ring-OSC clock oscillation frequency
: X1 input clock oscillation frequency
Operating mode
(X1 input clock)
(Ring-OSC clock)
Operating mode
Oscillates
Figure 19-7. STOP Mode Release by RESET Input
(2) When Ring-OSC clock is used as CPU clock
(1) When X1 input clock is used as CPU clock
instruction
instruction
STOP
STOP
CHAPTER 19 STANDBY FUNCTION
Oscillates
Oscillation stopped
MK××
User’s Manual U16228EJ2V0UD
STOP mode
0
0
0
0
0
1
−
STOP mode
PR××
0
0
1
1
1
×
−
Oscillation stabilization time (2
IE
0
1
0
×
1
×
×
Oscillation
stopped
Oscillation
period
Reset
stopped
period
Reset
ISP
×
×
1
0
1
×
×
Operation
stopped
Operation
(17/f
stopped
(17/f
R
Next address
instruction execution
Interrupt servicing
execution
Next address
instruction execution
Interrupt servicing
execution
STOP mode held
Reset processing
)
R
Oscillates
)
Oscillates
Operation
Operating mode
(Ring-OSC clock)
Operating mode
(Ring-OSC clock)
11
/f
XP
to 2
16
/f
XP
)