UPD78F0138 NEC, UPD78F0138 Datasheet - Page 153

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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(2) Capture/compare control register 0n (CRC0n)
Cautions 1. Timer operation must be stopped before setting CRC00.
This register controls the operation of the 16-bit timer capture/compare registers (CR00n, CR01n).
CRC0n can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CRC0n to 00H.
Remark n = 0:
Address: FFBCH
Symbol
CRC00
2. When the mode in which clear & start occurs on a match between TM00 and CR000 is
3. The capture operation is not performed if both the rising and falling edges are specified as
4. To ensure that the capture operation is performed properly, the capture trigger requires a
n = 0, 1:
selected with 16-bit timer mode control register 00 (TMC00), CR000 should not be specified
as a capture register.
the valid edge of TI000.
pulse two cycles longer than the count clock selected by prescaler mode register 00
(PRM00).
CRC002
CRC001
CRC000
7
0
0
1
0
1
0
1
Figure 6-8. Format of Capture/Compare Control Register 00 (CRC00)
After reset: 00H
µ
µ
PD780131, 780132
PD780133, 780134, 78F0134, 780136, 780138, 78F0138
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Operates as compare register
Operates as capture register
Captures on valid edge of TI010
Captures on valid edge of TI000 by reverse phase
Operates as compare register
Operates as capture register
6
0
R/W
User’s Manual U16228EJ2V0UD
5
0
CR010 operating mode selection
CR000 operating mode selection
CR000 capture trigger selection
4
0
3
0
CRC002
2
CRC001
1
CRC000
0
153

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