UPD78F0138 NEC, UPD78F0138 Datasheet - Page 377

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

17.4.4 Interrupt request hold
executed, request acknowledgement is held pending until the end of execution of the next instruction.
instructions (interrupt request hold instructions) are listed below.
CPU processing
There are instructions where, even if an interrupt request is issued for them while another instruction is being
• MOV PSW, #byte
• MOV A, PSW
• MOV PSW, A
• MOV1 PSW. bit, CY
• MOV1 CY, PSW. bit
• AND1 CY, PSW. bit
• OR1 CY, PSW. bit
• XOR1 CY, PSW. bit
• SET1 PSW. bit
• CLR1 PSW. bit
• RETB
• RETI
• PUSH PSW
• POP PSW
• BT PSW. bit, $addr16
• BF PSW. bit, $addr16
• BTCLR PSW. bit, $addr16
• EI
• DI
• Manipulation instructions for the IF0L, IF0H, IF1L, IF1H, MK0L, MK0H, MK1L, MK1H, PR0L, PR0H, PR1L, and
Caution The BRK instruction is not one of the above-listed interrupt request hold instructions. However,
Figure 17-11 shows the timing at which interrupt requests are held pending.
Remarks 1. Instruction N: Interrupt request hold instruction
PR1H registers.
the software interrupt activated by executing the BRK instruction causes the IE flag to be
cleared. Therefore, even if a maskable interrupt request is generated during execution of the
BRK instruction, the interrupt request is not acknowledged.
2. Instruction M: Instruction other than interrupt request hold instruction
3. The ××PR (priority level) values do not affect the operation of ××IF (instruction request).
IF
Instruction N
Figure 17-11. Interrupt Request Hold
CHAPTER 17 INTERRUPT FUNCTIONS
User’s Manual U16228EJ2V0UD
Instruction M
PSW and PC saved, jump
to interrupt servicing
Interrupt servicing
program
These
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