MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 134

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

MT9072
134
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PRBSMFOI Pseudo Random Bit Sequence MultiframeCounter Overflow Interrupt. When unmasked
MFOOFOI Multiframes Out Of Sync Overflow Interrupt. When unmasked this interrupt bit goes
COFAOI
PRBSOI
MFSYNI
TFSYNI
CRCOI
OOFOI
BPVOI
COFAI
Name
FEOI
CRCI
FBEI
SEFI
LOSI
Table 106 - Receive Synchronization and Alarm Interrupt Status Register(Y34) (T1)
AISI
Framing Bit Error Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the framing bit error counter changes from FFH to 00H. This bit is reset after a
read of Y34 or Y24.
CRC-6 Error Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the CRC-6 error counter changes from FFH to 00H. This bit is reset after a read of
Y34 or Y24.
Out Of Frame Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the out of frame counter changes state from changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
Change of Frame Alignment Counter Overflow Interrupt. When unmasked this interrupt
bit goes high whenever the change of frame alignment counter changes from FFH to 00H.
This bit is reset after a read of Y34 or Y24.
Bipolar Violation Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the bipolar violation counter changes from FFH to 00H. This bit is reset after a read
of Y34 or Y24.
Pseudo Random Bit Sequence Error Counter Overflow Interrupt. When unmasked this
interrupt bit goes high whenever the PRBS error counter changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
this interrupt bit goes high whenever the multiframe counter attached to the PRBS error
counter change from. FFH to 00H. 1 - unmasked, 0 - masked. This bit is reset after a read of
Y34 or Y24.
high whenever the multiframes out of frame counter changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
Terminal Frame Synchronization Interrupt. When unmasked this interrupt bit goes high
whenever a change of state of terminal frame synchronization condition exists. This bit is
reset after a read of Y34 or Y24.
Multiframe Synchronization Interrupt. When unmasked this interrupt bit goes high
whenever a change of state of multiframe synchronization condition exists. This bit is reset
after a read of Y34 or Y24.
Framing Bit Error Interrupt. When unmasked this interrupt bit goes high whenever an
erroneous framing bit is detected (provided the circuit is in terminal frame sync). This bit is
reset after a read of Y34 or Y24.
Change of Frame Alignment Interrupt. When unmasked this interrupt bit goes high
whenever a change of frame alignment occurs after a reframe. This bit is reset after a
read of Y34 or Y24.
Severely Errored Frame Interrupt. When unmasked this interrupt bit goes high whenever
a sequence of 2 framing errors out of 6 occurs. This bit is reset after a read of Y34 or Y24.
Alarm Indication Signal Interrupt. When unmasked this interrupt bit goes high whenever
a received all ones condition exists.This bit is reset after a read of Y34 or Y24.
CRC-6 Error Interrupt. When unmasked this interrupt bit goes high whenever a local CRC-6
error occurs. This bit is reset after a read of Y34 or Y24.
LOSS Interrupt. When unmasked this interrupt bit goes high upon loss of Signal. This bit is
reset after a read of Y34 or Y24.
Functional Description
Advance Information