MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 250

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

MT9072
AC Electrical Characteristics - Transmit Data Link Timing
250
1.5Mb/s
Bit Cells
TXCL
1.5 Mhz Clock
TxDLC - Note 2
(Output)
TxDLC - Note 3
(Output)
TxDL
(Input)
Note 1 - TxDLC output applies for every second frame (FPi) pulse (250us) only
Note 2 - Clock output provided by setting control bit DLCK=1 (register address Y06)
Note 3 - Enable output provided by clearing control bit DLCK=0 (register address Y06)
Note 4- TXCL is an input 1.5 Mhz clock for the PCM24 interface
Note 5- The TXDLC clock is provided one frame before it is used in ESF Mode in Frames 2 4
1
2
3
4
RXBF
RxDLC
RxDL
Clock Delay
Enable Delay
Data Delay Read
Data Hold Read
Characteristics
Figure 42 - Receive Data Link Functional Diagram
tCD
tED
Figure 41 - Transmit Data Link Pin Timing
Sym
t
t
t
t
DDR
DHR
CD
ED
t
DS
Inputs Data
tCD
MT9072
Min
t
DH
Typ
100
100
100
50
Max
Units
ns
ns
ns
ns
Preliminary Information
150pF load on RxDLC
150pF load on RxDLC
150pF load on RxDL
150pF load on RxDL
Test Conditions
V
V
V
VT
T
T
T