MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 217

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MT9072

Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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Advance Information
Bit
Bit
15
14
13
12
11
4
3
2
1
0
Name
F1SM
F0HM
F0EM
F0RM
F0SM
Name
F7HM
F7EM
F7RM
F7SM
F6HM Framer 6 HDLC Mask. This is the mask bit for the F6HVS status bit in the Interrupt Vector
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Framer 1 Sync and Overflow Mask. This is the mask bit for the F1SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 HDLC Mask. This is the mask bit for the F0HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 Elastic Mask. This is the mask bit for the F0EVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 Rx Line Mask. This is the mask bit for the F0RVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 Sync and Overflow Mask. This is the mask bit for the F0SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 7 HDLC Mask. This is the mask bit for the F7HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 7 Elastic Mask. This is the mask bit for the F7EVS status bit in the Interrupt Vector
Register(address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 7 Rx Line Mask. This is the mask bit for the F7RVS status bit in the Interrupt Vector
Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 7 Sync and Overflow Mask. This is the mask bit for the F7SVS status bit in the Interrupt
Vector Register(address 911). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Table 201 - Interrupt Vector 1 Mask Register (R/W Address 902) (E1)
Table 202 - Interrupt Vector 2 Mask Register (R/W Address 903) (E1)
Functional Description
Functional Description
MT9072
217

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