mt48lc1m16a1 Micron Semiconductor Products, mt48lc1m16a1 Datasheet - Page 18

• Manufacturer Part Number: mt48lc1m16a1
• Description: Synchronous Dram
• Manufacturer: Micron Semiconductor Products

operation that would result from the same fixed-
length burst with AUTO PRECHARGE. The disadvan-
tage of the PRECHARGE command is that it requires
that the command and address buses be available at the
appropriate time to issue the command; the advantage
of the PRECHARGE command is that it can be used to
truncate fixed-length or full-page bursts.
BURST TERMINATE command, and fixed-length
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
Full-page READ bursts can be truncated with the
COMMAND
COMMAND
COMMAND
ADDRESS
ADDRESS
ADDRESS
NOTE: DQM is LOW.
CLK
CLK
CLK
DQ
DQ
DQ
CAS Latency = 1
BANK,
BANK,
T0
COL n
T0
COL n
T0
BANK,
COL n
READ
READ
READ
CAS Latency = 2
CAS Latency = 3
Terminating a READ Burst
T1
T1
T1
NOP
NOP
NOP
D
OUT
n
T2
T2
T2
NOP
NOP
NOP
D
D
n + 1
OUT
OUT
n
Figure 12
T3
T3
T3
NOP
NOP
NOP
18
D
n + 2
D
D
n + 1
OUT
OUT
OUT
n
READ bursts may be truncated with a BURST TERMI-
NATE command, provided that AUTO PRECHARGE
was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which
the last desired data element is valid, where x equals the
CAS latency minus one. This is shown in Figure 12 for
each possible CAS latency; data element n + 3 is the last
desired data element of a longer burst.
TERMINATE
TERMINATE
TERMINATE
T4
BURST
T4
BURST
T4
BURST
X = 0 cycles
X = 1 cycle
D
D
n + 3
n + 2
D
n + 1
OUT
OUT
OUT
X = 2 cycles
T5
T5
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
NOP
D
n + 3
D
n + 2
OUT
OUT
T6
T6
T6
NOP
NOP
NOP
D
n + 3
OUT
DON’T CARE
T7
NOP
16Mb: x16
IT SDRAM
©1999, Micron Technology, Inc.